5T93GL02集成電路(IC)的時(shí)鐘緩沖器驅(qū)動(dòng)器規(guī)格書(shū)PDF中文資料
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廠商型號(hào) |
5T93GL02 |
參數(shù)屬性 | 5T93GL02 封裝/外殼為20-TSSOP(0.173",4.40mm 寬);包裝為管件;類別為集成電路(IC)的時(shí)鐘緩沖器驅(qū)動(dòng)器;產(chǎn)品描述:IC CLK BUFFER 1:2 450MHZ 20TSSOP |
功能描述 | 2.5V LVDS, 1:2 Glitchless Clock Buffer TERABUFFER? II |
封裝外殼 | 20-TSSOP(0.173",4.40mm 寬) |
文件大小 |
380.13 Kbytes |
頁(yè)面數(shù)量 |
18 頁(yè) |
生產(chǎn)廠商 | Renesas Technology Corp |
企業(yè)簡(jiǎn)稱 |
RENESAS【瑞薩】 |
中文名稱 | 瑞薩科技有限公司官網(wǎng) |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-2-11 11:10:00 |
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General Description
The 5T93GL02 2.5V differential clock buffer is a user-selectable
differential input to two LVDS outputs. The fanout from a differential
input to two LVDS outputs reduces loading on the preceding driver
and provides an efficient clock distribution network. The 5T93GL02
can act as a translator from a differential HSTL, eHSTL, LVEPECL
(2.5V), LVPECL (3.3V), CML, or LVDS input to LVDS outputs. A
single-ended 3.3V / 2.5V LVTTL input can also be used to translate
to LVDS outputs. The redundant input capability allows for a
glitchless change-over from a primary clock source to a secondary
clock source up to 450MHz. Selectable inputs are controlled by SEL.
During the switchover, the output will disable low for up to three clock
cycles of the previously-selected input clock. The outputs will remain
low for up to three clock cycles of the newly-selected clock, after
which the outputs will start from the newly-selected input. A FSEL
pin has been implemented to control the switchover in cases where
a clock source is absent or is driven to DC levels below the minimum
specifications.
The 5T93GL02 outputs can be asynchronously enabled/disabled.
When disabled, the outputs will drive to the value selected by the GL
pin. Multiple power and grounds reduce noise.
Features
? Guaranteed low skew: <50ps (maximum)
? Very low duty cycle distortion: <100ps (maximum)
? High speed propagation delay: <2.2ns (maximum)
? Up to 450MHz operation
? Selectable inputs
? Hot insertable and over-voltage tolerant inputs
? 3.3V/2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL
(3.3V), CML or LVDS input interface
? Selectable differential inputs to two LVDS outputs
? Power-down mode
? At power-up, FSEL should be LOW
? 2.5V VDD
? -40°C to 85°C ambient operating temperature
? Available in TSSOP package
? Recommends IDT5T9302 if glitchless input selection is not
required
? Not Recommended for New Designs
? For functional replacement use 8SLVP1102
產(chǎn)品屬性
- 產(chǎn)品編號(hào):
5T93GL02PGGI8
- 制造商:
Renesas Electronics America Inc
- 類別:
集成電路(IC) > 時(shí)鐘緩沖器,驅(qū)動(dòng)器
- 系列:
TeraBuffer? II
- 包裝:
管件
- 類型:
扇出緩沖器(分配),多路復(fù)用器
- 電路數(shù):
1
- 比率 - 輸入:
1:2
- 差分 - 輸入:
是/是
- 輸入:
CML,eHSTL,HSTL,LVDS,LVEPECL,LVPECL,LVTTL
- 輸出:
LVDS
- 電壓 - 供電:
2.3V ~ 2.7V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
20-TSSOP(0.173",4.40mm 寬)
- 供應(yīng)商器件封裝:
20-TSSOP
- 描述:
IC CLK BUFFER 1
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
IDT |
23+ |
SSOP |
3000 |
一級(jí)代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價(jià) | ||
IDT |
2023+ |
SSOP |
80000 |
一級(jí)代理/分銷渠道價(jià)格優(yōu)勢(shì) 十年芯程一路只做原裝正品 |
詢價(jià) | ||
IDT |
23+ |
SOP |
5000 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
IDT |
23+ |
SSOP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
IDT |
21+ |
20TSSOP |
13880 |
公司只售原裝,支持實(shí)單 |
詢價(jià) | ||
Renesas Electronics America In |
24+ |
20-TSSOP(0.173 4.40mm 寬) |
9350 |
獨(dú)立分銷商 公司只做原裝 誠(chéng)心經(jīng)營(yíng) 免費(fèi)試樣正品保證 |
詢價(jià) | ||
IDT |
22+ |
20TSSOP |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價(jià) | ||
IDT |
1931+ |
N/A |
1186 |
加我qq或微信,了解更多詳細(xì)信息,體驗(yàn)一站式購(gòu)物 |
詢價(jià) | ||
IDT |
SSOP |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
IDT |
22+ |
NA |
1186 |
加我QQ或微信咨詢更多詳細(xì)信息, |
詢價(jià) |