70V27集成電路（IC）的存儲器規(guī)格書PDF中文資料

Features:

◆ True Dual-Ported memory cells which allow simultaneous

access of the same memory location

◆ High-speed access

– Commercial: 15/20/25/35/55ns (max.)

– Industrial: 15/20/35ns (max.)

◆ Low-power operation

– IDT70V27S

Active: 500mW (typ.)

Standby: 3.3mW (typ.)

– IDT70V27L

Active: 500mW (typ.)

Standby: 660μW (typ.)

◆ Separate upper-byte and lower-byte control for bus

matching capability

◆ On-chip port arbitration logic

◆ Dual chip enables allow for depth expansion without

external logic

◆ IDT70V27 easily expands data bus width to 32 bits or more

using the Master/Slave select when cascading more than

one device

◆ M/S = VIH for BUSY output flag on Master,

M/S = VIL for BUSY input on Slave

◆ Busy and Interrupt Flags

◆ Full on-chip hardware support of semaphore signaling

between ports

◆ Fully asynchronous operation from either port

◆ LVTTL-compatible, single 3.3V (±0.3V) power supply

◆ Available in 100-pin Thin Quad Flatpack (TQFP)

◆ Industrial temperature range (-40°C to +85°C) is available

for selected speeds

◆ Green parts available, see ordering information