74AHC595S16-13集成電路（IC）的移位寄存器規(guī)格書(shū)PDF中文資料

Description

The 74AHC595 is an advanced high speed CMOS device.

An eight bit shift register accepts data from the serial input (DS) on each positive transition of the shift register clock (STCP). When asserted low the reset function (MR) sets all shift register values to zero and is independent of all clocks.

Data from the input serial shift register is placed in the output register with a rising pulse on the storages resister clock (SHCP). With the output enable (OE?asserted low the 3-state outputs Q0-Q7 become active and present.

All registers capture data on rising edge and change output on the falling edge. If both clocks are connected together, the input shift register is always one clock cycle ahead of the output register.

Features

Wide Supply Voltage Range from 2.0 V to 5.5V

Sinks or sources 8mA at VCC= 4.5V

CMOS low power consumption

Schmitt Trigger Action at All Inputs

Inputs Accept up to 5.5V

ESD Protection Tested per JESD 22

? Exceeds 200-V Machine Model (A115-A)

? Exceeds 2000-V Human Body Model (A114-A)

? Exceeds 1000-V Charged Device Model (C101C)

Latch-Up Exceeds 250mA per JESD 78, Class II

Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

Halogen and Antimony Free. “Green” Device (Note 3)

Applications

General Purpose Logic

Serial to Parallel Data conversion

Capture and hold data for extended periods of time

Allow simple serial bit streams from a microcontrolle

many peripheral lines as needed

Wide array of products such as:

?Computer peripherals

?Appliances

?Industrial control