74ALS174中文資料飛利浦數(shù)據手冊PDF規(guī)格書
74ALS174規(guī)格書詳情
DESCRIPTION
The 74ALS174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output.
All Q outputs will be forced Low independent of clock or data inputs by a Low voltage level on the MR input. The device is useful for applications where true outputs only are required, and the clock and master reset are common to all storage elements.
FEATURES
? Four edge-triggered D flip-flops
? Buffered common clock
? Buffered asynchronous master reset
產品屬性
- 型號：
74ALS174
- 制造商：
PHILIPS
- 制造商全稱：
NXP Semiconductors
- 功能描述：
Hex D flip-flop
| 供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
TI/德州儀器 |
23+ |
SMD |
5000 |
原廠授權代理,海外優(yōu)勢訂貨渠道?？商峁┐罅繋齑?詳 |
詢價 | ||
TI |
24+ |
3.9 |
2987 |
只售原裝自家現(xiàn)貨!誠信經營!歡迎來電! |
詢價 | ||
TI |
SOP5.2 |
650 |
正品原裝--自家現(xiàn)貨-實單可談 |
詢價 | |||
TI/德州儀器 |
23+ |
DIP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
ti |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開13%稅票 |
詢價 | ||
24+ |
DIP |
50 |
詢價 | ||||
TI |
23+ |
sop |
3200 |
全新原裝、誠信經營、公司現(xiàn)貨銷售 |
詢價 | ||
FAI |
24+ |
SMD |
20000 |
一級代理原裝現(xiàn)貨假一罰十 |
詢價 | ||
TI |
23+ |
SOP16 |
1092 |
全新原裝現(xiàn)貨 |
詢價 | ||
N/A |
20+ |
DIP |
1351 |
進口原裝現(xiàn)貨,假一賠十 |
詢價 |
