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74HCT107DB規(guī)格書(shū)詳情
GENERAL DESCRIPTION
The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs.
The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation.
The reset (nR) is an asynchronous active LOW input.
When LOW, it overrides the clock and data inputs, forcing the Q output LOW and the Q output HIGH.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
FEATURES
? Output capability: standard
? ICC category: flip-flops
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
NXP |
21+ |
14SOIC |
13880 |
公司只售原裝,支持實(shí)單 |
詢價(jià) | ||
ph |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開(kāi)13%稅票 |
詢價(jià) | ||
Nexperia(安世) |
22+ |
SO-14 |
9852 |
只做原裝正品現(xiàn)貨,或訂貨假一賠十! |
詢價(jià) | ||
PHILIPS |
1996 |
100 |
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詢價(jià) | |||
HARRIS/哈里斯 |
98+ |
IC |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
NXP/恩智浦 |
2020+ |
DIP14 |
5000 |
原裝現(xiàn)貨,優(yōu)勢(shì)渠道訂貨假一賠十 |
詢價(jià) | ||
Nexperia(安世) |
1923+ |
SO-14 |
2260 |
向鴻只做原裝正品,我們沒(méi)有假貨!倉(cāng)庫(kù)庫(kù)存優(yōu)勢(shì) |
詢價(jià) | ||
NXP |
NA |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
NXP/恩智浦 |
22+ |
DIP14 |
20000 |
原裝現(xiàn)貨,實(shí)單支持 |
詢價(jià) | ||
Nexperia(安世) |
23+ |
SOP14 |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!! |
詢價(jià) |
