74LS76D中文資料摩托羅拉數(shù)據(jù)手冊(cè)PDF規(guī)格書
替換型號(hào)
74LS76D規(guī)格書詳情
The SN54/74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long as minimum set-up times are observed. Input data is transferred to the outputs on the HIGH-to-LOW clock transitions.
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|---|---|---|---|---|---|---|---|
ti |
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詢價(jià) |
