74LVC125ADR2G集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

74LVC125ADR2G屬于集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器。由安森美半導(dǎo)體公司制造生產(chǎn)的74LVC125ADR2G緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。

Low-Voltage CMOS Quad Buffer

With 5 V?Tolerant Inputs and Outputs (3?State, Non?Inverting)

The 74LVC125A is a high performance, non?inverting quad buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows 74LVC125A inputs to be safely driven from 5.0 V devices. The 74LVC125A is suitable for memory address driving and all TTL level bus oriented transceiver applications.

Features

? Designed for 1.2 to 3.6 V VCC Operation

? 5.0 V Tolerant ? Interface Capability With 5.0 V TTL Logic

? Supports Live Insertion and Withdrawal

? IOFF Specification Guarantees High Impedance When VCC = 0 V

? 24 mA Output Sink and Source Capability

? Near Zero Static Supply Current in all Three Logic States (10 A)

Substantially Reduces System Power Requirements

? ESD Performance: Human Body Model >2000 V

Machine Model >200 V

? These Devices are Pb?Free, Halogen Free/BFR Free and are RoHS Compliant