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74LVC162373A集成電路(IC)的鎖存器規(guī)格書PDF中文資料

74LVC162373A
廠商型號

74LVC162373A

參數(shù)屬性

74LVC162373A 封裝/外殼為48-TFSOP(0.240",6.10mm 寬);包裝為管件;類別為集成電路(IC)的鎖存器;產(chǎn)品描述:IC 16BIT D TRANSP LATCH 48TSSOP

功能描述

16-bit D-type transparent latch; 30 Ω series termination resistors; 5 V tolerant inputs/outputs; 3-state

封裝外殼

48-TFSOP(0.240",6.10mm 寬)

文件大小

246.02 Kbytes

頁面數(shù)量

14

生產(chǎn)廠商 Nexperia B.V. All rights reserved
企業(yè)簡稱

NEXPERIA安世

中文名稱

安世半導(dǎo)體(中國)有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

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更新時間

2025-2-23 23:00:00

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74LVC162373A規(guī)格書詳情

1. General description

The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with 30 Ω

termination resistors and 3-state outputs. The 74LVCH162373A has separate D-type inputs with

bus hold for each latch. Both devices can be used as two 8-bit transparent latches or a single 16-

bit transparent latch. Both devices feature two latch enables (1LE and 2LE) and two output enables

(1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches.

In this condition the latches are transparent, a latch output will change each time its corresponding

D-input changes. When nLE is LOW the latches store the information that was present at the inputs

a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to

assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the

latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

These devices are fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the devices

when they are powered down.

2. Features and benefits

? Overvoltage tolerant inputs to 5.5 V

? Wide supply voltage range from 1.2 V to 3.6 V

? CMOS low power consumption

? Multibyte flow-through standard pinout architecture

? Multiple low inductance supply pins for minimum noise and ground bounce

? Direct interface with TTL levels

? All data inputs have bus hold (74LVCH162373A only)

? IOFF circuitry provides partial Power-down mode operation

? Complies with JEDEC standard:

? JESD8-7A (1.65 V to 1.95 V)

? JESD8-5A (2.3 V to 2.7 V)

? JESD8-C/JESD36 (2.7 V to 3.6 V)

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-B exceeds 200 V

? CDM JESD22-C101E exceeds 1000 V

? Specified from -40 °C to +85 °C and -40 °C to +125 °C

產(chǎn)品屬性

  • 產(chǎn)品編號:

    74LVC162373ADGG,51

  • 制造商:

    Nexperia USA Inc.

  • 類別:

    集成電路(IC) > 鎖存器

  • 系列:

    74LVC

  • 包裝:

    管件

  • 邏輯類型:

    D 型透明鎖存器

  • 電路:

    8:8

  • 輸出類型:

    三態(tài)

  • 電壓 - 供電:

    1.2V ~ 3.6V

  • 延遲時間 - 傳播:

    3.3ns

  • 電流 - 輸出高、低:

    12mA,12mA

  • 工作溫度:

    -40°C ~ 125°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    48-TFSOP(0.240",6.10mm 寬)

  • 供應(yīng)商器件封裝:

    48-TSSOP

  • 描述:

    IC 16BIT D TRANSP LATCH 48TSSOP

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
Nexperia(安世)
23+
SSOP48300mil
7350
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!!
詢價
PHILIPS/飛利浦
23+
NA/
1119
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票
詢價
NXP/恩智浦
24+
TSSOP-24
30000
原裝正品公司現(xiàn)貨,假一賠十!
詢價
NXP/恩智浦
1525+
NA
500
原裝現(xiàn)貨支持BOM配單服務(wù)
詢價
Nexperia(安世)
1923+
TSSOP-48
2260
向鴻只做原裝正品,我們沒有假貨!倉庫庫存優(yōu)勢
詢價
NXP
589220
16余年資質(zhì) 絕對原盒原盤 更多數(shù)量
詢價
NXP/恩智浦
21+
TSSOP-24
8080
只做原裝,質(zhì)量保證
詢價
NXP
24+
TSSOP
30000
詢價
NXP/恩智浦
22+
SMD
9000
原裝正品
詢價
NEXPERIA/安世
22+
SOT370-1
8900
英瑞芯只做原裝正品!!!
詢價