74LVTH162244MEA集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

General Description

The LVT162244 and LVTH162244 contain sixteen non inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble con trolled. Individual 3-STATE control inputs can be shorted together for 8-bit or 16-bit operation. The LVT162244 and LVTH162244 are designed with equivalent 25? series resistance in both the HIGH and LOW states of the output. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters. The LVTH162244 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

Features

■ Input and output interface capability to systems at 5V VCC

■ Bushold data inputs eliminate the need for external pull up resistors to hold unused inputs (74LVTH162244), also available without bushold feature (74LVT162244).

■ Live insertion/extraction permitted

■ Power Up/Power Down high impedance provides glitch free bus loading

■ Outputs include equivalent series resistance of 25? to make external termination resistors unnecessary and reduce overshoot and undershoot

■ Functionally compatible with the 74 series 162244

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human-body model > 2000V

Machine model > 200V

Charged-device > 1000V

■ Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)