80C187中文資料英特爾數(shù)據(jù)手冊PDF規(guī)格書

The Intel 80C187 is a high-performance math coprocessor that extends the architecture of the 80C186 with floating-point, extended integer, and BCD data types. A computing system that includes the 80C187 fully conforms to the IEEE Floating-Point Standard. The 80C187 adds over seventy mnemonics to the instruction set of the 80C186, including support for arithmetic, logarithmic, exponential, and trigonometric mathematical operations. The 80C187 is implemented with 1.5 micron, high-speed CHMOS III technology and packaged in both a 40-pin CERDIP and a 44-pin PLCC package. The 80C187 is upward object-code compatible from the 8087 math coprocessor and will execute code written for the 80387DX and 80387SX math coprocessors.

■ High Performance 80-Bit Internal Architecture

■ Implements ANSI/IEEE Standard 754- 1985 for Binary Floating-Point Arithmetic

■ Upward Object-Code Compatible from 8087

■ Fully Compatible with 387DX and 387SX Math Coprocessors. Implements all 387 Architectural Enhancements over 8087

■ Directly Interfaces with 80C186 CPU

■ 80C186/80C187 Provide a Software/ Binary Compatible Upgrade from 80186/82188/8087 Systems

■ Expands 80C186’s Data Types to Include 32-, 64-, 80-Bit Floating-Point, 32-, 64-Bit Integers and 18-Digit BCD Operands

■ Directly Extends 80C186’s Instruction Set to Trigonometric, Logarithmic, Exponential, and Arithmetic Instructions for All Data Types

■ Full-Range Transcendental Operations for SINE, COSINE, TANGENT, ARCTANGENT, and LOGARITHM

■ Built-In Exception Handling

■ Eight 80-Bit Numeric Registers, Usable as Individually Addressable General Registers or as a Register Stack

■ Available in 40-Pin CERDIP and 44-Pin PLCC Package