889474集成電路（IC）的時(shí)鐘緩沖器驅(qū)動(dòng)器規(guī)格書(shū)PDF中文資料

GENERAL DESCRIPTION

The 889474 is a high speed 2-to-1 differential multiplexer

with integrated 2 output LVDS fanout buffer and internal

termination and is a member of the family of high performance

clock solutions from IDT. The 889474 is optimized for

high speed and very low output skew, making it suitable

for use in demanding applications such as SONET,

1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally

terminated differential input and VREF_AC pins allow other differential

signal families such as LVPECL, LVDS, LVHSTL and CML to be easily

interfaced to the input with minimal use of external components. The

889474 is packaged in a small 4mm x 4mm 24-pin VFQFN package

which makes it ideal for use in space-constrained applications.

FEATURES

? Two differential LVDS outputs

? INx, nINx pair can accept the following differential input levels:

LVPECL, LVDS, LVHSTL, CML

? 50Ω internal input termination to VT

? Maximum output frequency: 2GHz (maximum)

? Additive phase jitter, RMS: 0.06ps (typical)

? Output skew: 20ps (maximum)

? Propagation delay: 700ps (maximum)

? 2.5V operating supply

? -40°C to 85°C ambient operating temperature

? Available in lead-free RoHS-complaint package