AD9271BSVZ-50集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

AD9271BSVZ-50屬于集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9271BSVZ-50模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對(duì)模擬信號(hào)進(jìn)行采樣，例如由麥克風(fēng)采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號(hào)。一般來說，數(shù)字輸出是二進(jìn)制補(bǔ)碼二進(jìn)制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進(jìn)行選擇。

GENERAL DESCRIPTION

The AD9271 is designed for low cost, low power, small size, and ease of use. It contains eight channels of a variable gain amplifier (VGA) with low noise preamplifier (LNA); an antialiasing filter (AAF); and a 12-bit, 10 MSPS to 50 MSPS analog-to-digital converter (ADC).

FEATURES

8 channels of LNA, VGA, AAF, and ADC

Low noise preamplifier (LNA)

Input-referred noise = 1.2 nV/√Hz @ 7.5 MHz typical

SPI-programmable gain = 14 dB/15.6 dB/18 dB

Single-ended input; VINmaximum = 400 mV p-p/333 mV p-p/250 mV p-p

Dual mode, active input impedance match

Bandwidth (BW) > 70 MHz

Full-scale (FS) output = 2 V p-p diff

Variable gain amplifier (VGA)

Gain range = ?6 dB to +24 dB

Linear-in-dB gain control

Antialiasing filter (AAF)

3rd-order Butterworth cutoff

Programmable from 8 MHz to 18 MHz

Analog-to-digital converter (ADC)

12 bits at 10 MSPS to 50 MSPS

SNR = 70 dB

SFDR = 80 dB

Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)

Data and frame clock outputs

Includes crosspoint switch to support

continuous wave (CW) Doppler

Low power, 150 mW/channel at 12 bits/40 MSPS (TGC)

60 mW/channel in CW Doppler

Single 1.8 V supply (3.3 V supply for CW Doppler output bias)

Flexible power-down modes

Overload recovery in <10 ns

Fast recovery from low power standby mode, <2 μs

100-pin TQFP