AD9573-EVALZ中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The AD9573 provides a highly integrated, dual output clock generator function including an on-chip PLL core that is optimized for PCI-e applications. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequency synthesizers to maximize line card performance. Other applications with demanding phase noise and jitter requirements also benefit from this part.

FEATURES

Fully integrated VCO/PLL core

0.54 ps rms jitter from 12 kHz to 20 MHz

Input crystal frequency of 25 MHz

Preset divide ratios for 100 MHz, 33.33 MHz

LVDS/LVCMOS output format

Integrated loop filter

Space saving 4.4 mm × 5.0 mm TSSOP

0.235W power dissipation

3.3V operation

APPLICATIONS

Line cards, switches, and routers

CPU/PCIe applications

Low jitter, low phase noise clock generation