AD9861RF/IF射頻/中頻RFID的射頻前端（LNA+PA）規(guī)格書PDF中文資料

AD9861屬于RF/IF射頻/中頻RFID的射頻前端（LNA+PA）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9861射頻前端（LNA + PA）本系列中的產(chǎn)品是各種集成電路，其中集成了射頻 (RF) 信號(hào)鏈連接到系統(tǒng)天線的部分中常見的一種或多種功能，如低噪聲放大器 (LNA) 和可編程放大器 (PA)。任何給定器件所含的實(shí)際功能各不相同，相比旨在提供更高應(yīng)用靈活性的器件，針對(duì)相對(duì)較窄應(yīng)用的器件通常集成更大一部分必要的信號(hào)鏈。

GENERAL DESCRIPTION

The AD9861 is a member of the MxFE family—a group of integrated converters for the communications market. The AD9861 integrates dual 10-bit analog-to-digital converters (ADC) and dual 10-bit digital-to-analog converters (TxDAC?). Two speed grades are available, -50 and -80. The -50 is optimized for ADC sampling of 50 MSPS and less, while the -80 is optimized for ADC sample rates between 50 MSPS and 80 MSPS. The dual TxDACs operate at speeds up to 200 MHz and include a bypassable 2× or 4× interpolation filter. Three auxiliary converters are also available to provide required system level control voltages or to monitor system signals.

FEATURES

Receive path includes dual 10-bit analog-to-digital

converters with internal or external reference, 50 MSPS and 80 MSPS versions

Transmit path includes dual 10-bit, 200 MSPS digital-to-analog converters with 1×, 2×, or 4× interpolation and programmable gain control

Internal clock distribution block includes a programmable phase-locked loop and timing generation circuitry, allowing single-reference clock operation

20-pin flexible I/O data interface allows various interleaved or noninterleaved data transfers in half-duplex mode and interleaved data transfers in full-duplex mode

Configurable through register programmability or optionally limited programmability through mode pins

Independent Rx and Tx power-down control pins

64-lead LFCSP package (9 mm × 9 mm footprint)

3 configurable auxiliary converter pins

APPLICATIONS

Broadband access

Broadband LAN

Communications (modems)