ADG3257集成電路（IC）的信號(hào)開(kāi)關(guān)多路復(fù)用器解碼器規(guī)格書(shū)PDF中文資料

ADG3257屬于集成電路（IC）的信號(hào)開(kāi)關(guān)多路復(fù)用器解碼器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的ADG3257信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器邏輯型信號(hào)開(kāi)關(guān)、多路復(fù)用器和編碼器 IC 可用于對(duì)以數(shù)字格式表示數(shù)據(jù)的電信號(hào)進(jìn)行路由和選擇。這些器件與設(shè)計(jì)用于模擬信號(hào)的類(lèi)似產(chǎn)品有所不同，它們保留的信息表示為兩個(gè)電狀態(tài)之一，而不是兩個(gè)外部界限內(nèi)的無(wú)窮變化量。

GENERAL DESCRIPTION

The ADG3257 is a CMOS bus switch comprised of four 2:1 multiplexers/demultiplexers with high impedance outputs. The device is manufactured on a CMOS process. This provides low power dissipation yet high switching speed and very low on resistance, allowing the inputs to be connected to the outputs without adding propagation delay or generating additional ground bounce noise.

The ADG3257 operates from a single 3.3 V/5 V supply. The control logic for each switch is shown in Table 1. These switches are bidirectional when on. In the off state, signal levels are blocked up to the supplies. When the power supply is off, the switches remain in the off state, isolating Port A and Port B.

This bus switch is suited to both switching and level translation applications. It can be used in applications requiring level trans-lation from 3.3 V to 2.5 V when powered from 3.3 V. Additionally, with a diode connected in series with 5 V VDD, the ADG3257 may also be used in applications requiring 5 V to 3.3 V level translation.

FEATURES

100 ps propagation delay through the switch

2 Ω switches connect inputs to outputs

Data rates up to 933 Mbps

Single 3.3 V/5 V supply operation

Level translation operation

Ultralow quiescent supply current (1 nA typical)

3.5 ns switching

Switches remain in the off state when power is off

Standard 3257 type pinout

APPLICATIONS

Bus switching

Bus isolation

Level translation

Memory switching/interleaving