ADN2812ACP-RL7中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書

GENERAL DESCRIPTION

The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ?40°C to +85°C ambient temperature, unless otherwise noted.

FEATURES

Serial data input: 12.3 Mb/s to 2.7 Gb/s

Exceeds SONET requirements for jitter transfer/

generation/tolerance

Quantizer sensitivity: 6 mV typical

Adjustable slice level: ±100 mV

Patented clock recovery architecture

Loss of signal (LOS) detect range: 3 mV to 15 mV

Independent slice level adjust and LOS detector

No reference clock required

Loss of lock indicator

I2C interface to access optional features

Single-supply operation: 3.3 V

Low power: 750 mW typical

5 mm × 5 mm 32-lead LFCSP

APPLICATIONS

SONET OC-1/OC-3/OC-12/OC-48 and all associated FEC rates

Fibre Channel, 2× Fibre Channel, GbE, HDTV

WDM transponders

Regenerators/repeaters

Test equipment

Broadband cross-connects and routers