ADP5050ACPZ-R7集成電路（IC）的線性穩(wěn)壓器控制器規(guī)格書PDF中文資料

ADP5050ACPZ-R7屬于集成電路（IC）的線性穩(wěn)壓器控制器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的ADP5050ACPZ-R7穩(wěn)壓器 - 線性 + 開關(guān)此產(chǎn)品族中的產(chǎn)品用于構(gòu)建執(zhí)行 DC-DC 轉(zhuǎn)換或電壓調(diào)節(jié)功能的電路，采用的是開關(guān)模式和線性穩(wěn)壓器功能的組合。雖然具體的拓?fù)涓鞑幌嗤?，但此類產(chǎn)品的主要目的是將開關(guān)模式技術(shù)的效率優(yōu)勢與線性穩(wěn)壓技術(shù)的低噪聲特性結(jié)合在一起。

GENERAL DESCRIPTION

The ADP5050 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators.

Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current. Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A.

The switching frequency of the ADP5050 can be programmed or synchronized to an external clock. The ADP5050 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.

The ADP5050 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current.

The optional I2C interface provides the user with flexible configuration options, including adjustable and fixed output voltage options, junction temperature overheat warning, low input voltage detection, and dynamic voltage scaling (DVS).

FEATURES

Wide input voltage range: 4.5 V to 15 V

±1.5 output accuracy over full temperature range

250 kHz to 1.4 MHz adjustable switching frequency

Adjustable/fixed output options via factory fuse or I2C interface

I2C interface with interrupt on fault conditions

Power regulation

Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A

sync buck regulators with low-side FET driver

Channel 3 and Channel 4: 1.2 A sync buck regulators

Channel 5: 200 mA low dropout (LDO) regulator

Single 8 A output (Channel 1 and Channel 2 operated in parallel)

Dynamic voltage scaling (DVS) for Channel 1 and Channel 4

Precision enable with 0.8 V accurate threshold

Active output discharge switch

Programmable phase shift in 90° steps

Individual channel FPWM/PSM mode selection

Frequency synchronization input or output

Optional latch-off protection on OVP/OCP failure

Power-good flag on selected channels

Low input voltage detection

Overheat detection on junction temperature

UVLO, OCP, and TSD protection

48-lead, 7 mm × 7 mm LFCSP package

?40°C to +125°C junction temperature

APPLICATIONS

Small cell base stations

FPGA and processor applications

Security and surveillance

Medical applications