AT52BR1672T中文資料愛(ài)特梅爾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Description

The AT52BR1672(T) combines a 16-megabit Flash (1M x 16) and a 2-megabit SRAM (organized as 128K x 16) in a stacked CBGA package; while the AT52BR1674(T) combines a 16- megabit Flash (1M x 16) and a 4-megabit SRAM (organized as 256K x 16) in a stacked CBGA package. Both devices operate at 2.7V to 3.3V in the industrial temperature range. The modules use a 16-megabit Flash with dual plane architecture for concurrent read/write operations. The Flash is organized as 12M + 4M for planes B and A, respectively.

Features

? 16-Mbit Flash and 2-Mbit/4-Mbit SRAM

? Single 66-ball 8 mm x 10 mm x 1.2 mm CBGA Package

? 2.7V to 3.3V Operating Voltage

Flash

? 2.7V to 3.3V Read/Write

? Access Time – 85 ns

? Sector Erase Architecture

– Thirty-one 32K Word (64K Byte) Sectors with Individual Write Lockout

– Eight 4K Word (8K Byte) Sectors with Individual Write Lockout

? Fast Word Program Time – 20 μs

? Fast Sector Erase Time – 300 ms

? Dual-plane Organization, Permitting Concurrent Read While Program/Erase

– Memory Plane A: Eight 4K Word and Seven 32K Word Sectors

– Memory Plane B: Twenty-four 32K Word Sectors

? Erase Suspend Capability

– Supports Reading and Programming from Any Sector by Suspending Erase of a Different Sector

– Supports Reading Any Word by Suspending Programming of Any Other Word

? Low-power Operation

– 30 mA Active

– 10 μA Standby

? Data Polling, Toggle Bit, Ready/Busy for End of Program Detection

? VPP Pin for Accelerated Program/Erase Operations

? RESET Input for Device Initialization

? Sector Lockdown Support

? Top/Bottom Block Configuration

? 128-bit Protection Register

SRAM

? 2-megabit (128K x 16)/4-megabit (256K x 16)

? 2.7V to 3.3V VCC Operating Voltage

? 70 ns Access Time

? Fully Static Operation and Tri-state Output

? 1.2V (Min) Data Retention

? Industrial Temperature Range