C8051F850-C-GM中文資料SILABS數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Memory

- Up to 8 kB flash

- Flash is in-system programmable in 512-Byte sectors

- Up to 512 Bytes RAM (256 + 256)

On-Chip Debug

- On-chip debug circuitry facilitates full speed, non-intrusive insystem

debug (no emulator required)

- Provides breakpoints, single stepping, inspect/modify memory

and registers

12-Bit Analog-to-Digital Converter

- Up to 16 input channels

- Up to 200 ksps 12-bit mode or 800 ksps 10-bit mode

- Internal VREF or external VREF supported

Internal Low-Power Oscillator

- Calibrated to 24.5 MHz

- Low supply current

- ±2 accuracy over supply and temperature

Internal Low-Frequency Oscillator

- 80 kHz nominal operation

- Low supply current

- Independent clock source for watchdog timer

2 Analog Comparators

- Programmable hysteresis and response time

- Configurable as interrupt or reset source

- Low current

General-Purpose I/O

- Up to 18 pins

- 5 V-Tolerant

- Crossbar-enabled

High-Speed CIP-51 μC Core

- Efficient, pipelined instruction architecture

- Up to 25 MIPS throughput with 25 MHz clock

- Uses standard 8051 instruction set

- Expanded interrupt handler

Communication Peripherals

- UART

- I2C / SMBus?

- SPI?

Timer/Counters and PWM

- 4 General-Purpose 16-bit Timer/Counters

- 16-bit Programmable Counter Array (PCA) with three channels

of PWM, capture/compare, or frequency output capability, and

hardware kill/safe state capability

Additional Support Peripherals

- Independent watchdog timer clocked from LFO

- 16-bit CRC engine

Unique Identifier

- 32-bit unique key for each device

Supply Voltage

- 2.2 to 3.6 V

Package Options

- 16-pin SOIC

- 20-pin QFN, 3 x 3 mm

- 24-pin QSOP

- Available in die form

- Qualified to AEC-Q100 Standards

Temperature Ranges:

- –40 to +125 °C (-Ix) and –40 to +85 °C (-Gx)