CDB4350開(kāi)發(fā)板套件編程器的評(píng)估板-數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書(shū)PDF中文資料

CDB4350屬于開(kāi)發(fā)板套件編程器的評(píng)估板-數(shù)模轉(zhuǎn)換器（DAC）。由凌云邏輯制造生產(chǎn)的CDB4350評(píng)估板 - 數(shù)模轉(zhuǎn)換器（DAC）該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過(guò)驗(yàn)證的設(shè)計(jì)環(huán)境中對(duì)用于將數(shù)字?jǐn)?shù)據(jù)轉(zhuǎn)換為模擬格式的器件進(jìn)行性能或特性評(píng)估。重點(diǎn)器件涵蓋范圍從以適合學(xué)生或愛(ài)好者使用的方式實(shí)現(xiàn)的適度功能器件，到適合電信基礎(chǔ)設(shè)施應(yīng)用的高級(jí)器件。

Description

The CS4350 is a complete stereo digital-to-analog system including PLL-based master clock derivation, digital interpolation, 5th-order multi-bit delta-sigma digital-to-analog conversion, digital de-emphasis, volume control, channel mixing, and analog filtering. The advantages of this architecture include ideal differential linearity, no distortion mechanisms due to resistor matching errors, no linearity drift over time and temperature, high tolerance to clock jitter, and a minimal set of external components.

Features

? Advanced Multi-bit Delta-Sigma Architecture

? 109 dB Dynamic Range

? -91 dB THD+N

? 24-Bit Conversion

? Supports Audio Sample Rates Up to 192 kHz

? Low-Latency Digital Filtering

? Single-Ended or Differential Analog Output Architecture

? Integrated PLL Locks to Incoming Left-Right Clock

– Eliminates the Need for External Masterclock Routing

– Reduces Interference and Jitter Sensitivity

– No External Loop Filter Components Required

? Automatic Sample-Rate Range Detection

? Popguard? Technology for Control of Clicks and Pops

– Hardware Popguard Disable for Fast Startups

? Supports All Standard Serial Audio Formats Including Time-Division Multiplexed (TDM)

? +1.5 V to 5.0 V Logic Supplies for Serial Port

? +3.3 V to 5.0 V Control Port Interface

Control Port Mode Features

? SPI? and I2C? Modes

? ATAPI Mixing

? Mute Control for Individual Channels

? Digital Volume Control with Soft Ramp

– 127.5 dB Attenuation

– 1/2 dB Step Size

– Zero Crossing Click-Free Transitions