CDP68HC68A2中文資料INTERSIL數(shù)據(jù)手冊PDF規(guī)格書

The CDP68HC68A2 is a CMOS 8-bit or 10-bit successive approximation analog to digital converter (A/D) with a standard Serial Peripheral Interface (SPI) bus and eight multiplexed analog inputs. Voltage referencing is user selectable to be relative to either VDD or analog channel 0 (AI0). The analog inputs can range between VSS and VDD.

The CDP68HC68A2 employs a switched capacitor, successive approximation A/D conversion technique which provides an inherent sample-and-hold function. An onchip Schmitt oscillator provides the internal timing for the A/D converter. The Schmitt input can be externally clocked or connected to a single, external capacitor to form an RC oscillator with a period of approximately 10-30ns per picofarad.

Conversion times are proportional to the oscillator period. At the maximum specified frequency of 1MHz, 10-bit conversions take 14μs per channel. At the same frequency, 8-bit conversions consume 12μs per channel.

Features

? 10-Bit Resolution

? 8-Bit Mode for Single Data Byte Transfers

? SPI (Serial Peripheral Interface) Compatible

? Operates Ratiometrically Referencing VDD or an External Source

? 14μs 0-Bit Conversion Time

? 8 Multiplexed Analog Input Channels

? Independent Channel Select

? Three Modes of Operation

? On Chip Oscillator

? Low Power CMOS Circuitry

? Intrinsic Sample and Hold