CXL5005M

CMOS-CCD 1H Delay Line for NTSC with PLL

Description TheCXL5005M/Paregeneral-purposeCCDdelaylineICswhichprovide1HdelaytimeofNTSC. Features ?Lowpowerconsumption90mW(Typ.) ?Smallsizepackage(14-pinSOP,DIP) ?LowdifferentialgainDG=3(Typ.) ?Inputsignalampiitude180IRE(=1.28Vp-p,max.) ?Lowinputcl

CXL5005M

CMOS-CCD 1H Delay Line for NTSC with PLL

Description\nThe CXL5005M/P are general-purpose CCD delay line ICs which provide 1H delay time of NTSC.; ? Low power consumption 90mW (Typ.)\n? Small size package (14-pin SOP, DIP)\n? Low differential gain DG = 3% (Typ.)\n? Input signal ampiitude 180 IRE (= 1.28Vp-p, max.)\n? Low input clock amplitude operation 200mVp-p (Min.)\n? Built-in triple PLL circuit\n? Built-in peripheral circuits (clock dr;

CXL5005M/P

CMOS-CCD 1H Delay Line for NTSC with PLL

CXL5005P

CMOS-CCD1HDelayLineforNTSCwithPLL

Description TheCXL5005M/Paregeneral-purposeCCDdelaylineICswhichprovide1HdelaytimeofNTSC. Features ?Lowpowerconsumption90mW(Typ.) ?Smallsizepackage(14-pinSOP,DIP) ?LowdifferentialgainDG=3(Typ.) ?Inputsignalampiitude180IRE(=1.28Vp-p,max.) ?Lowinputcl

DMF5005N

LCDModuleSpecification

DMF5005NF

LCDModuleTechnicalSpecification

OperatingTemp.:min.0°C~max.50°C StorageTemp.:min.-20°C~max.60°C DotPixels:240(W)×64(H)dots DotSize:0.49(W)×0.49(H)mm DotPitch:0.53(W)×0.53(H)mm ViewingArea:132.0(W)×39.0(H)mm OutlineDimensions:180.0(W)×65.0(H)×12.0max.(D)mm