DM74AS286N集成電路（IC）的奇偶校驗發(fā)生器校驗器規(guī)格書PDF中文資料

General Description

These universal, 9-bit parity generators/checkers utilize advanced Schottky high performance circuitry and feature odd/even outputs to facilitate operation of either odd or even parity applications. The word length capability is easily expanded by cascading.

The DM74AS286 can be used to upgrade the performance of most systems utilizing the DM74AS280 parity generator/checker. Although the DM74AS286 is implemented without expander inputs, the corresponding function is provided by the availability of an input pin XMIT. XMIT is a control line which makes parity error output active and parity an input port when HIGH; when LOW, parity error output is inactive and parity becomes an output port. In addition, parity I/O control circuitry contains a feature to keep the I/O port in the 3-STATE during power UP or DOWN to prevent bus glitches.

Features

■ PNP inputs to reduce bus loading

■ Generates either odd or even parity for nine data lines

■ Inputs are buffered to lower the drive requirements

■ Can be used to upgrade existing systems using MSI

parity circuits

■ Cascadable for n-bits

■ Switching specifications at 50 pF

■ Switching specifications guaranteed over full

temperature and VCC range

■ A parity I/O portable to drive bus