DS2148TN集成電路（IC）的電信規(guī)格書(shū)PDF中文資料

DESCRIPTION

The DS2148 is a complete selectable E1 or T1 Line Interface Unit (LIU) for short- and long-haul applications. Throughout the data sheet, J1 is represented wherever T1 exists. Receive sensitivity adjusts automatically to the incoming signal and can be programmed for 0dB to 12dB or 0dB to 43dB for E1 applications and 0dB to 30dB or 0dB to 36dB for T1 applications. The device can generate the necessary G.703 E1 waveshapes in 75? or 120? applications and DSX-1 line build outs or CSU line build outs of 0dB, -7.5dB, -15dB, and -22.5dB for T1 applications.

FEATURES

■ Complete E1, T1, or J1 line interface unit (LIU)

■ Supports both long- and short-haul trunks

■ Internal software-selectable receive-side termination for 75?/100?/120Ω

■ 5V power supply

■ 32-bit or 128-bit crystal-less jitter attenuator requires only a 2.048MHz master clock for both E1 and T1 with option to use 1.544MHz for T1

■ Generates the appropriate line build outs, with and without return loss, for E1 and DSX-1 and CSU line build outs for T1

■ AMI, HDB3, and B8ZS, encoding/decoding

■ 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz clock output synthesized to recovered clock

■ Programmable monitor mode for receiver

■ Loopbacks and PRBS pattern generation/ detection with output for received errors

■ Generates/detects in-band loop codes, 1 to 16 bits including CSU loop codes

■ 8-bit parallel or serial interface with optional hardware mode

■ Multiplexed and nonmultiplexed parallel bus supports Intel or Motorola

■ Detects/generates blue (AIS) alarms

■ NRZ/bipolar interface for TX/RX data I/O

■ Transmit open-circuit detection

■ Receive Carrier Loss (RCL) indication (G.775)

■ High-Z State for TTIP and TRING

■ 50mA (rms) current limiter