EVAL-CED1Z開發(fā)板套件編程器的配件規(guī)格書PDF中文資料

EVAL-CED1Z屬于開發(fā)板套件編程器的配件。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的EVAL-CED1Z配件與此類別中其他器件一起使用的輔助產(chǎn)品。

GENERAL DESCRIPTION

The AD79441 is a 14-bit, 2.5 MSPS successive approximation analog-to-digital converter (SAR ADC). It contains a low power, high speed, 14-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and a versatile serial interface port. On the rising edge of CNV, the AD7944 samples an analog input, IN+, between 0 V and VREF with respect to a ground sense, IN?. The AD7944 features a very high sampling rate turbo mode (TURBO high) and a reduced power normal mode (TURBO low) for low power applications where the power is scaled with the throughput.

FEATURES

14-bit resolution with no missing codes

Throughput: 2.5 MSPS (TURBO high), 2.0 MSPS (TURBO low)

Low power dissipation

15.5 mW at 2.5 MSPS, with external reference

28 mW at 2.5 MSPS, with internal reference

INL: ±0.25 LSB typical, ±1.0 LSB maximum

SNR

84 dB, with on-chip reference

84.5 dB, with external reference

4.096 V internal reference: typical drift of ±10 ppm/°C

Pseudo differential analog input voltage range

0 V to VREF with VREF up to 5.0 V

Allows use of any input range

No pipeline delay

Logic interface: 1.8 V/2.5 V/2.7 V

Proprietary serial interface

SPI/QSPI/MICROWIRE/DSP compatible

Ability to daisy-chain multiple ADCs with busy indicator

20-lead, 4 mm × 4 mm LFCSP (QFN)

APPLICATIONS

Battery-powered equipment

Communications

ATE

Data acquisition systems

Medical instruments