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H5PS1G63EFR中文資料海力士數(shù)據(jù)手冊PDF規(guī)格書

H5PS1G63EFR
廠商型號

H5PS1G63EFR

功能描述

1Gb(64Mx16) DDR2 SDRAM

文件大小

1.30933 Mbytes

頁面數(shù)量

80

生產(chǎn)廠商 Hynix Semiconductor
企業(yè)簡稱

HYNIX海力士

中文名稱

海力士半導(dǎo)體官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-6-11 14:30:00

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H5PS1G63EFR規(guī)格書詳情

Description

Device Features & Ordering Information

Key Features

? VDD = 1.8 +/- 0.1V

? VDDQ = 1.8 +/- 0.1V

? All inputs and outputs are compatible with SSTL_18 interface

?8 banks

? Fully differential clock inputs (CK, /CK) operation

? Double data rate interface

? Source synchronous-data transaction aligned to bidirectional data strobe (DQS, DQS)

? Differential Data Strobe (DQS, DQS)

? Data outputs on DQS, DQSedges when read (edged DQ)

? Data inputs on DQS centers when write (centered DQ)

? On chip DLL align DQ, DQS and DQStransition with CK transition

? DM mask write data-in at the both rising and falling edges of the data strobe

? All addresses and control inputs except data, data strobes and data masks latched on the rising

edges of the clock

? Programmable CAS latency 3, 4, 5 and 6 supported

? Programmable additive latency 0, 1, 2, 3, 4 and 5 supported

? Programmable burst length 4/8 with bothnibble sequential and interleave mode

? Internal eight bank operations with single pulsed RAS

? Auto refresh and self refresh supported

? tRAS lockout supported

? 8K refresh cycles /64ms

? JEDEC standard 84ball FBGA(x16)

? Full strength driver option controlled by EMR

? On Die Termination supported

? Off Chip Driver Impedance Adjustment supported

? Self-Refresh High Temperature Entry

產(chǎn)品屬性

  • 型號:

    H5PS1G63EFR

  • 制造商:

    HYNIX

  • 制造商全稱:

    Hynix Semiconductor

  • 功能描述:

    1Gb DDR2 SDRAM

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價(jià)格
HY
23+
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3000
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19+
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原廠代理渠道,每一顆芯片都可追溯原廠;
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只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增
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