首頁 >HCF4027BEY>規(guī)格書列表
零件編號(hào) | 下載&訂購(gòu) | 功能描述 | 制造商&上傳企業(yè) | LOGO |
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HCF4027BEY | DUAL-J-K MASTER-SLAVE FLIP-FLOP DESCRIPTION TheHCC4027B(extendedtemperaturerange)andHCF4027B(intermediatetemperaturerange)aremonolithicintegratedcircuit,availablein16-leaddualin-lineplasticorceramicpackageandplasticmicropackage. ■SET-RESETCAPABILITY ■STATICFLIP-FLOPOPERATION-RETAINS | STMICROELECTRONICSSTMicroelectronics 意法半導(dǎo)體意法半導(dǎo)體集團(tuán) | STMICROELECTRONICS | |
HCF4027BEY | DUAL J-K MASTER SLAVE FLIP-FLOP | STMICROELECTRONICSSTMicroelectronics 意法半導(dǎo)體意法半導(dǎo)體集團(tuán) | STMICROELECTRONICS | |
HCF4027BEY | 包裝:卷帶(TR) 封裝/外殼:16-DIP(0.300",7.62mm) 功能:設(shè)置(預(yù)設(shè))和復(fù)位 類別:集成電路(IC) 觸發(fā)器 描述:IC FF JK TYPE DUAL 1BIT 16DIP | STMICROELECTRONICSSTMicroelectronics 意法半導(dǎo)體意法半導(dǎo)體集團(tuán) | STMICROELECTRONICS | |
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop Generaldescription TheHEF4027Bisaedge-triggereddualJKflip-flopwhichfeaturesindependentset-direct(SD),clear-direct(CD),clock(CP)inputsandoutputs(Q,Q).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHasync | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
DualJKflip-flopRev.9??18November2011 | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
DualJKflip-flop 1.Generaldescription TheHEF4027Bisadualpositive-edgetriggeredJKflip-flopfeaturingindependentsetdirect(nSD), cleardirect(nCD),clockinputs(nCP)andcomplementaryoutputs(nQandnQ).Dataisaccepted whennCPisLOW,andtransferredtotheoutputonthepositive-goingedgeof | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國(guó))有限公司 | NEXPERIA | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJKflip-flop DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips |
產(chǎn)品屬性
- 產(chǎn)品編號(hào):
HCF4027BEY
- 制造商:
STMicroelectronics
- 類別:
集成電路(IC) > 觸發(fā)器
- 系列:
4000B
- 包裝:
卷帶(TR)
- 功能:
設(shè)置(預(yù)設(shè))和復(fù)位
- 類型:
JK 型
- 輸出類型:
補(bǔ)充型
- 不同 V、最大 CL 時(shí)最大傳播延遲:
90ns @ 15V,50pF
- 觸發(fā)器類型:
正邊沿
- 電流 - 輸出高、低:
6.8mA,6.8mA
- 電壓 - 供電:
3V ~ 20V
- 工作溫度:
-55°C ~ 125°C(TA)
- 安裝類型:
通孔
- 供應(yīng)商器件封裝:
16-DIP
- 封裝/外殼:
16-DIP(0.300",7.62mm)
- 描述:
IC FF JK TYPE DUAL 1BIT 16DIP
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
ST |
2015+ |
DIP |
19889 |
一級(jí)代理原裝現(xiàn)貨,特價(jià)熱賣! |
詢價(jià) | ||
ST |
22+ |
DIP |
44500 |
進(jìn)口原裝!現(xiàn)貨庫(kù)存 |
詢價(jià) | ||
ST |
24+ |
DIP-16 |
2987 |
只售原裝自家現(xiàn)貨!誠(chéng)信經(jīng)營(yíng)!歡迎來電! |
詢價(jià) | ||
SG |
23+ |
65480 |
詢價(jià) | ||||
STM |
2020+ |
DIP14 |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
ST |
24+ |
DIP |
6430 |
原裝現(xiàn)貨/歡迎來電咨詢 |
詢價(jià) | ||
ST |
24+ |
DIP16 |
36500 |
原裝現(xiàn)貨/放心購(gòu)買 |
詢價(jià) | ||
ST |
21+ |
DIP |
1000 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
STM |
20+ |
IC |
1001 |
就找我吧!--邀您體驗(yàn)愉快問購(gòu)元件! |
詢價(jià) | ||
22+ |
NA |
3000 |
加我QQ或微信咨詢更多詳細(xì)信息, |
詢價(jià) |
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