HCTS299D中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書

Description

The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/ storage register with three-state bus interface capability. The register has four synchronous operating modes controlled by the two select inputs (S0, S1). The mode select, the serial data (DS0, DS7) and the parallel data (IO0 - IO7) respond only to the low to high transition of the clock (CP) pulse. S0, S1 and the data inputs must be one set up time period prior to the clocks positive transition. The master reset (MR) is an asynchronous active low input.

Features

? 3 Micron Radiation Hardened CMOS SOS

? Total Dose 200K RAD (Si)

? SEP Effective LET No Upsets: >100 MEV-cm2/mg

? Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)

? Dose Rate Survivability: >1 x 1012 RAD (Si)/s

? Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse

? Latch-Up Free Under Any Conditions

? Fanout (Over Temperature Range)

??? -Bus Driver Outputs: 15 LSTTL Loads

? Military Temperature Range: -55°C to +125°C

? Significant Power Reduction Compared to LSTTL ICs

? DC Operating Voltage Range: 4.5V to 5.5V

? LSTTL Input Compatibility

??? -VIL = 0.8V Max

??? -VIH = VCC/2 Min

? Input Current Levels Ii ≤ 5μA at VOL, VOH