HD155101BF中文資料日立數(shù)據(jù)手冊PDF規(guī)格書

Description

The HD155101BF was developed for GSM and EGSM cellular systems, and integrates most of the functions of a transceiver. The HD155101BF incorporates the bias circuit for a RF LNA, a 1st mixer, 1stIF amplifier, 2nd mixer, AGC amplifier and an IQ quadrature demodulator for the receiver, and an IQ quadrature modulator and offset PLL for the transmitter. Also, on chip are the dividers for the 1st & 2nd local oscillator signals and 90? phase splitter. Moreover the HD155101BF includes control circuits to implement power saving modes. These functions can operate down to 2.7 V and are housed in a 48-pin LQFP SMD package.

Features

? Highly integrated RF processing for hand-portables

? Wide operating frequency

RX:

- RF: 925 to 960 MHz

- 1st IF: 130 to 300 MHz

- 2nd IF: 26 to 60 MHz

TX:

- RF: 880 to 915 MHz

- IF: 156 to 360 MHz

? Offset PLL architecture reduces TX spurious

? Low current consumption (Vcc = 3 V)

RX mode: 42.5 mA Typ (including IFVCO current (2.5 mA Typ)) + LNA transistor current (5.6 mA Typ)

TX mode: 38.0 mA Typ (including IFVCO current (2.5 mA Typ)) Idle mode: 1 μA Typ

? Operating supply voltage:

- Phase comparator and TX VCO driver circuits: 2.7 to 5.25 V

- Other blocks: 2.7 to 3.6 V

? Operating temperature range: –20 to +85°C

? 48 pin SMD Low Profile Quad Flat Package (LQFP): FP-48