HD74ALVCH162244中文資料日立數(shù)據(jù)手冊PDF規(guī)格書

Description

The HD74ALVCH162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

All outputs, which are designed to sink up to 12 mA, include 26 ? resistors to reduce overshoot and undershoot.

Features

? VCC = 2.3 V to 3.6 V

? Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

? Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)

? High output current ±12 mA (@VCC = 3.0 V)

? Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

? All outputs have equivalent 26 ? series resistors, so no external resistors are required.