HDD16M72D9W中文資料HANBIT數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The HDD16M72D9W is a 64M x 72 bit Double Data Rate(DDR) Synchronous Dynamic RAM high-density memory module. The module consists of nine CMOS 16M x 8 bit with 4banks DDR SDRAMs in 66pin TSOP-II 400mil packages and 2K EEPROM in 8-pin TSSOP package on a 184-pin glass-epoxy. Four 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each DDR SDRAM. The HDD16M72D9W is a DIMM(Dual in line Memory Module) .Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable latencies and burst lengths allows the same device to be useful for a variety of high bandwidth, high performance memory system applications. All module components may be powered from a single 2.5V DC power supply and all inputs and outputs are SSTL_2 compatible.

FEATURES

? Part Identification

HDD16M72D9W – 10A : 100MHz (CL=2)

HDD16M72D9W – 13A : 133MHz (CL=2)

HDD16M72D9W – 13B : 133MHz (CL=2.5)

? Power supply : VDD: 2.5V ± 0.2V, VDDQ: 2.5V ± 0.2V

? Double-data-rate architecture; two data transfers per clock cycle

? Bidirectional data strobe(DQS)

? Differential clock inputs(CK and CK)

? DLL aligns DQ and DQS transition with CK transition

? Programmable Read latency 2, 2.5 (clock)

? Programmable Burst length (2, 4, 8)

? Programmable Burst type (sequential & interleave)

? Edge aligned data output, center aligned data input

? Auto & Self refresh, 15.6us refresh interval (4K/64ms refresh)

? Serial presence detect with EEPROM

? PCB : Height 1200 mil, double sided component