HEF4042BT中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書
HEF4042BT規(guī)格書詳情
DESCRIPTION
The HEF4042B is a 4-bit latch with four data inputs (D0 to D3), four buffered latch outputs (O0 to O3), four buffered complementary latch outputs (O0 to O3) and two common enable inputs (E0 and E1). Information on D0 to D3 is transferred to O0 to O3 while both E0 and E1 are in the same state, either HIGH or LOW. O0 to O3 follow D0 to D3 as long as both E0 and E1 remain in the same state. When E0 and E1 are different, D0 to D3 do not affect O0 to O3 and the information in the latch is stored. O0 to O3 are always the complement of O0 to O3. The exclusive-OR input structure allows the choice of either polarity for E0 and E1. With one enable input HIGH, the other enable input is active HIGH; with one enable input LOW, the other enable input is active LOW.
APPLICATION INFORMATION
Some examples of applications for the HEF4042B are:
? Buffer storage
? Holding register
產(chǎn)品屬性
- 型號：
HEF4042BT
- 功能描述：
1-Bit D-Type Latch
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
PHILIPS/飛利浦 |
22+ |
DIP-16 |
9600 |
原裝現(xiàn)貨,優(yōu)勢供應(yīng),支持實(shí)單! |
詢價(jià) | ||
PHSSEMICONDUCTOR |
2020+ |
NA |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
PHILIPS/飛利浦 |
23+ |
10000 |
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價(jià)格優(yōu)勢、品種 |
詢價(jià) | |||
PHSSEMICONDUCTOR |
2021+ |
NA |
100500 |
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨 |
詢價(jià) | ||
NXP |
23+ |
SOP |
7300 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
NXP/恩智浦 |
23+ |
DIP16 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
NXP/恩智浦 |
24+ |
DIP16 |
18500 |
授權(quán)代理直銷,原廠原裝現(xiàn)貨,假一罰十,特價(jià)銷售 |
詢價(jià) | ||
NXP(恩智浦) |
23+ |
NA |
20094 |
正納10年以上分銷經(jīng)驗(yàn)原裝進(jìn)口正品做服務(wù)做口碑有支持 |
詢價(jià) | ||
PHILIPS/飛利浦 |
22+ |
CDIP16 |
14008 |
原裝正品 |
詢價(jià) | ||
PHILIPS/飛利浦 |
QQ咨詢 |
CDIP |
824 |
全新原裝 研究所指定供貨商 |
詢價(jià) |
