HEF4517BD中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
HEF4517BD規(guī)格書(shū)詳情
DESCRIPTION
The HEF4517B consists of two identical, independent 64-bit static shift registers. Each register has separate clock (CP), data input (D), parallel input-enable/output-enable (PE/EO) and four 3-state outputs of the 16th, 32nd, 48th and 64th bit positions (O16 to O64). Data at the D input is entered into the first bit on the LOW to HIGH transition of the clock, regardless of the state of PE/EO.
When PE/EO is LOW the outputs are enabled and the device is in the 64-bit serial mode.
When PE/EO is HIGH the outputs are disabled (high impedance OFF-state), the 64-bit shift register is divided into four 16-bit shift registers with D, O16, O32 and O48 as data inputs of the 1st, 17th, 33rd, and 49th bit respectively. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
NXP |
22+23+ |
SOP16 |
18129 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
PHILIPS |
22+ |
DIP |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
PH |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤(pán) 更多數(shù)量 |
詢價(jià) | ||||
PHI |
23+ |
DIP-16 |
3200 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售 |
詢價(jià) | ||
PHILIPS/飛利浦 |
24+ |
CDIP-16 |
4 |
只做原廠渠道 可追溯貨源 |
詢價(jià) | ||
PHI |
24+ |
DIP16 |
96 |
詢價(jià) | |||
NXP |
23+ |
NA |
10065 |
原裝正品,有掛有貨,假一賠十 |
詢價(jià) | ||
PHILIPS |
24+ |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | |||
PH |
23+ |
SOP |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
PHI |
22+ |
SOP7.2mm |
10000 |
原裝正品優(yōu)勢(shì)現(xiàn)貨供應(yīng) |
詢價(jià) |
