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ICS2509CYG-T中文資料ICST數(shù)據(jù)手冊PDF規(guī)格書
| 廠商型號 |
ICS2509CYG-T |
| 功能描述 | 3.3V Phase-Lock Loop Clock Driver |
| 文件大小 |
248.21 Kbytes |
| 頁面數(shù)量 |
7 頁 |
| 生產(chǎn)廠商 | Integrated Circuit Systems |
| 企業(yè)簡稱 |
ICST |
| 中文名稱 | Integrated Circuit Systems官網(wǎng) |
| 原廠標(biāo)識 |  |
| 數(shù)據(jù)手冊 | |
| 更新時間 | 2025-5-23 14:20:00 |
| 人工找貨 | ICS2509CYG-T價格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
ICS2509CYG-T規(guī)格書詳情
General Description
The ICS2509C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the CLKIN signal with the CLKOUT signal. It is specifically designed for use with synchronous SDRAMs. The ICS2509C operates at 3.3V VCC and drives up to nine clock loads.
Features
? Meets or exceeds PC133 registered DIMM specification 1.1
? Spread Spectrum Clock Compatible
? Distributes one clock input to one bank of five and one bank of four outputs
? Separate output enable(OEA,OEB) for each output bank
? Operating frequency 25 MHz to 175 Mhz
? External feedback input (FBIN) terminal is used to synchrionize the outputs to the clock input
? No external RC network required
? Operates at 3.3V Vcc
? Plastic 24-pin 173mil TSSOP package
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
ICS |
22+ |
TSSOP24 |
38576 |
原裝正品現(xiàn)貨,可開13個點(diǎn)稅 |
詢價 | ||
ICS |
24+ |
TSOP |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價 | ||
ICS |
24+ |
TSSOP |
2560 |
絕對原裝!現(xiàn)貨熱賣! |
詢價 | ||
TI |
02+ |
TSSOP24 |
226 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
IDT |
24+ |
TSSOP-24 |
4081 |
優(yōu)勢現(xiàn)貨 |
詢價 | ||
ICS |
2005 |
TSSOP |
78 |
原裝現(xiàn)貨海量庫存歡迎咨詢 |
詢價 | ||
ICS |
2223+ |
TSSOP24 |
26800 |
只做原裝正品假一賠十為客戶做到零風(fēng)險 |
詢價 | ||
ICS |
24+ |
TSOP24 |
5825 |
公司原廠原裝現(xiàn)貨假一罰十!特價出售!強(qiáng)勢庫存! |
詢價 | ||
ICS |
23+ |
4032 |
5020 |
全新原裝現(xiàn)貨 |
詢價 | ||
ICS |
2020+ |
0252+ |
592 |
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可 |
詢價 |
