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ICS91305YGILF-T中文資料ICSI數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
ICS91305YGILF-T規(guī)格書(shū)詳情
General Description
The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds from 10 to 133 MHz.
Features
? Zero input - output delay
? Frequency range 10 - 133 MHz (3.3V)
? 5V tolerant input REF
? High loop filter bandwidth ideal for Spread Spectrum applications.
? Less than 200 ps Jitter between outputs
? Skew controlled outputs
? Skew less than 250 ps between outputs
? Available in 8 pin 150 mil SOIC & 173 mil TSSOP packages
? 3.3V ±10 operation
? Supports industrial temperature range -40°C to 85°C
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
ICS |
22+23+ |
TSSOP-16 |
37178 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
ICS |
SOP16 |
68900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
ICS |
24+ |
TSSOP |
22 |
詢價(jià) | |||
IDT |
22+ |
SOP |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢價(jià) | ||
IDT |
19+ |
SOIC-16PIN |
74005 |
原廠代理渠道,每一顆芯片都可追溯原廠； |
詢價(jià) | ||
IDT |
24+ |
TSSOP-16 |
3736 |
優(yōu)勢(shì)現(xiàn)貨 |
詢價(jià) | ||
N/A |
2021+ |
SMD |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
INTEGRATEDCIRCUITSYSTEMS |
24+ |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | |||
ICS |
06+ |
TSSOP16 |
616 |
一級(jí)代理,專注軍工、汽車(chē)、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
ICS |
2005 |
SOP16 |
292 |
原裝現(xiàn)貨海量庫(kù)存歡迎咨詢 |
詢價(jià) |
