ICS9248YF-39LF-T中文資料瑞薩數據手冊PDF規(guī)格書

Features

? 3.3V outputs: SDRAM, PCI, REF, 48/24MHz

? 2.5V outputs: CPU, IOAPIC

? 20 ohm CPU clock output impedance

? 20 ohm PCI clock output impedance

? Skew from CPU (earlier) to PCI clock - 1.5 to 4 ns,

center 2.6 ns.

? No external load cap for CL=18pF crystals

? ±175 ps CPU clock skew

? 250ps (cycle to cycle) CPU jitter

? Smooth frequency switch, with selections from 66.8

to 150 MHz CPU.

? I2C interface for programming

? 3ms power up clock stable time

? Clock duty cycle 45-55.

? 48 pin 300 mil SSOP package

? 3.3V operation, 5V tolerant inputs (with series R)

?