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IDT72261LA20TFI中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書

IDT72261LA20TFI
廠商型號(hào)

IDT72261LA20TFI

功能描述

CMOS SuperSync FIFO

文件大小

304.5 Kbytes

頁(yè)面數(shù)量

27 頁(yè)

生產(chǎn)廠商 Integrated Device Technology, Inc.
企業(yè)簡(jiǎn)稱

IDT

中文名稱

Integrated Device Technology, Inc.官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-2-19 17:52:00

IDT72261LA20TFI規(guī)格書詳情

DESCRIPTION:

The IDT72261LA/72271LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following:

? The limitation of the frequency of one clock input with respect to the other has been removed. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency.

? The period required by the retransmit operation is now fixed and short.

? The first word data latency period, from the time the first word is written to an empty FIFO to the time it can be read, is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)

FEATURES:

? Choose among the following memory organizations:

IDT72261LA 16,384 x 9

IDT72271LA 32,768 x 9

? Pin-compatible with the IDT72281/72291 SuperSync FIFOs

? 10ns read/write cycle time (8ns access time)

? Fixed, low first word data latency time

? Auto power down minimizes standby power consumption

? Master Reset clears entire FIFO

? Partial Reset clears data, but retains programmable settings

? Retransmit operation with fixed, low first word data latency time

? Empty, Full and Half-Full flags signal FIFO status

? Programmable Almost-Empty and Almost-Full flags, each flag can default to one of two preselected offsets

? Program partial flags by either serial or parallel means

? Select IDT Standard timing (using EF and FF flags) or First Word Fall Through timing (using OR and IR flags)

? Output enable puts data outputs into high impedance state

? Easily expandable in depth and width

? Independent Read and Write clocks (permit reading and writing simultaneously)

? Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64-pin Slim Thin Quad Flat Pack (STQFP)

? High-performance submicron CMOS technology

? Industrial temperature range (–40°C to +85°C) is available

產(chǎn)品屬性

  • 型號(hào):

    IDT72261LA20TFI

  • 功能描述:

    IC FIFO 8192X18 LP 20NS 64QFP

  • RoHS:

  • 類別:

    集成電路(IC) >> 邏輯 - FIFO

  • 系列:

    7200

  • 標(biāo)準(zhǔn)包裝:

    90

  • 功能:

    同步

  • 存儲(chǔ)容量:

    288K(16K x 18)

  • 數(shù)據(jù)速率:

    100MHz

  • 訪問(wèn)時(shí)間:

    10ns

  • 電源電壓:

    4.5 V ~ 5.5 V

  • 工作溫度:

    0°C ~ 70°C

  • 安裝類型:

    表面貼裝

  • 封裝/外殼:

    64-LQFP

  • 供應(yīng)商設(shè)備封裝:

    64-TQFP(14x14)

  • 包裝:

    托盤

  • 其它名稱:

    72271LA10PF

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
IDT
24+
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16000
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IDT
2015+
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19889
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IDT
21+
QFP
10000
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IDT
24+
35200
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IDT
23+
QFP
8621
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IDT
23+
64STQFP(10X1
9526
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IDT
23+
QFP
7300
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IDT
23+
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10000
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IDT
24+
QFP
6980
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IDT
2138+
QFP
8960
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