IS61SF12832-7.5TQ中文資料北京矽成數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The ISSI IS61SF12832 and IS61SF12836 are high-speed synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications. It is organized as 131,072 words by 32 bits or 36 bits, fabricated with ISSIs advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.

FEATURES

? Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 12 ns

? Internal self-timed write cycle

? Individual Byte Write Control and Global Write

? Clock controlled, registered address, data inputs and control signals

? Pentium? or linear burst sequence control using MODE input

? Three chip enables for simple depth expansion and address pipelining

? Common data inputs and data outputs

? JEDEC 100-Pin TQFP and 119-pin PBGA package

? Single +3.3V +10, –5 power supply

? Power-down snooze mode