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ISPLSI2032-80LT48I中文資料萊迪思數(shù)據(jù)手冊(cè)PDF規(guī)格書

ISPLSI2032-80LT48I
廠商型號(hào)

ISPLSI2032-80LT48I

功能描述

In-System Programmable High Density PLD

文件大小

145.5 Kbytes

頁面數(shù)量

15

生產(chǎn)廠商 Lattice Semiconductor
企業(yè)簡(jiǎn)稱

Lattice萊迪思

中文名稱

萊迪思半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-24 23:21:00

ISPLSI2032-80LT48I規(guī)格書詳情

Description

The ispLSI 2032 and 2032A are High Density Programmable Logic Devices. The devices contain 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2032 and 2032A feature 5V in system programmability and in-system diagnostic capabilities. The ispLSI 2032 and 2032A offer nonvolatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.

Features

? ENHANCEMENTS

— ispLSI 2032A is Fully Form and Function Compat to the ispLSI 2032, with Identical Timing Specifcations and Packaging

— ispLSI 2032A is Built on an Advanced 0.35 Micron E2CMOS? Technology

? HIGH DENSITY PROGRAMMABLE LOGIC

— 1000 PLD Gates

— 32 I/O Pins, Two Dedicated Inputs

— 32 Registers

— High Speed Global Interconnect

— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.

— Small Logic Block Size for Random Logic

? HIGH PERFORMANCE E2CMOS? TECHNOLOGY

— fmax = 180 MHz Maximum Operating Frequency

— tpd = 5.0 ns Propagation Delay

— TTL Compatible Inputs and Outputs

— Electrically Erasable and Reprogrammable

— Non-Volatile

— 100 Tested at Time of Manufacture

— Unused Product Term Shutdown Saves Power

? IN-SYSTEM PROGRAMMABLE

— In-System Programmable (ISP?) 5V Only

— Increased Manufacturing Yields, Reduced Time-to Market and Improved Product Quality

— Reprogram Soldered Devices for Faster Prototyp

? OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBIL OF FIELD PROGRAMMABLE GATE ARRAYS

— Complete Programmable Device Can Combine G Logic and Structured Designs

— Enhanced Pin Locking Capability

— Three Dedicated Clock Input Pins

— Synchronous and Asynchronous Clocks

— Programmable Output Slew Rate Control to Minimize Switching Noise

— Flexible Pin Placement

— Optimized Global Routing Pool Provides Global Interconnectivity

產(chǎn)品屬性

  • 型號(hào):

    ISPLSI2032-80LT48I

  • 制造商:

    Rochester Electronics LLC

  • 功能描述:

    - Bulk

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
LATTICE
24+
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9862
全新原裝現(xiàn)貨/假一罰百!
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LATTICE(萊迪思)
23+
TQFP-48(7x7)
907
深耕行業(yè)12年,可提供技術(shù)支持。
詢價(jià)
LATTICE(萊迪思)
23+
TQFP-48(7x7)
1
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開增值稅票
詢價(jià)
LATTICE
2020+
TQFP48
80000
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增
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LATTICE
TQFP48
68900
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨!
詢價(jià)
Lattic
21+
25000
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詢價(jià)
LATTICE
22+
TQFP48
9800
只做原裝正品假一賠十!正規(guī)渠道訂貨!
詢價(jià)
ISPLSI2032-80LT48I
101
101
詢價(jià)
LATTICE
23+
TQFP48
8000
只做原裝現(xiàn)貨
詢價(jià)
LATTICE
23+
TQFP48
7000
詢價(jià)