ISPLSI2128VE-100LT100中文資料萊迪思數(shù)據(jù)手冊PDF規(guī)格書

Description

The ispLSI 2128VE is a High Density Programmable Logic Device available in 128 and 64 I/O-pin versions.

Features

? SuperFAST HIGH DENSITY IN-SYSTEM

PROGRAMMABLE LOGIC

— 6000 PLD Gates

— 128 and 64 I/O Pin Versions, Eight Dedicated Inputs

— 128 Registers

— High Speed Global Interconnect

— Wide Input Gating for Fast Counters, State

Machines, Address Decoders, etc.

— Small Logic Block Size for Random Logic

— 100 Functional, JEDEC and Pinout Compatible

with ispLSI 2128V Devices

? 3.3V LOW VOLTAGE 2128 ARCHITECTURE

— Interfaces with Standard 5V TTL Devices

? HIGH PERFORMANCE E2CMOS? TECHNOLOGY

— fmax = 250MHz Maximum Operating Frequency

— tpd = 4.0ns Propagation Delay

— Electrically Erasable and Reprogrammable

— Non-Volatile

— 100 Tested at Time of Manufacture

— Unused Product Term Shutdown Saves Power

? IN-SYSTEM PROGRAMMABLE

— 3.3V In-System Programmability (ISP?) Using

Boundary Scan Test Access Port (TAP)

— Open-Drain Output Option for Flexible Bus Interface

Capability, Allowing Easy Implementation of Wired

OR Bus Arbitration Logic

— Increased Manufacturing Yields, Reduced Time-to

Market and Improved Product Quality

— Reprogram Soldered Devices for Faster Prototyping

? 100 IEEE 1149.1 BOUNDARY SCAN TESTABLE

? THE EASE OF USE AND FAST SYSTEM SPEED OF

PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAS

— Enhanced Pin Locking Capability

— Three Dedicated Clock Input Pins

— Synchronous and Asynchronous Clocks

— Programmable Output Slew Rate Control

— Flexible Pin Placement

— Optimized Global Routing Pool Provides Global

Interconnectivity

? LEAD-FREE PACKAGE OPTIONS