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ISPLSI5256VE

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE

In-System Programmable 3.3V SuperWIDE? High Density PLD

Features ?SecondGenerationSuperWIDEHIGHDENSITY IN-SYSTEMPROGRAMMABLELOGICDEVICE —3.3VPowerSupply —UserSelectable3.3V/2.5VI/O —24000PLDGates/512Macrocells —Upto256I/OPins —512Registers —High-SpeedGlobalInterconnect —SuperWIDEGenericLogicBlock(32Macrocel

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE

In-System Programmable 3.3V SuperWIDE? High Density PLD

ispLSI 5000VE Description\nThe ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs.\nOutputs from the GLBs drive the Global Routing Pool; ? Second Generation SuperWIDE HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC DEVICE\n?? — 3.3V Power Supply\n?? — User Selectable 3.3V/2.5V I/O\n?? — 12000 PLD Gates / 256 Macrocells\n?? — Up to 144 I/O Pins\n?? — 256 Registers\n?? — High-Speed Global Interconnect\n?? — SuperWIDE Generic Logic Block (32 ;

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE-100LB272

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE-100LB272I

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE-100LF256

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE-100LF256I

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE-100LT100

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE-100LT100I

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

ISPLSI5256VE-100LT128

In-System Programmable 3.3V SuperWIDE High Density PLD

ispLSI5000VEDescription TheispLSI5000VEFamilyofIn-SystemProgrammableHighDensityLogicDevicesisbasedonGenericLogicBlocks(GLBs)of32registeredmacrocellsandasingleGlobalRoutingPool(GRP)structureinterconnectingtheGLBs. OutputsfromtheGLBsdrivetheGlobalRoutin

LatticeLattice Semiconductor

萊迪思萊迪思半導(dǎo)體公司

Lattice

詳細(xì)參數(shù)

  • 型號：

    ISPLSI5256VE

  • 功能描述：

    CPLD - 復(fù)雜可編程邏輯器件

  • RoHS：

    否

  • 制造商：

    Lattice

  • 存儲類型：

    EEPROM

  • 大電池?cái)?shù)量：

    128

  • 最大工作頻率：

    333 MHz

  • 延遲時(shí)間：

    2.7 ns

  • 可編程輸入/輸出端數(shù)量：

    64

  • 工作電源電壓：

    3.3 V

  • 最大工作溫度：

    + 90 C

  • 最小工作溫度：

    0 C

  • 封裝/箱體：

    TQFP-100

供應(yīng)商型號品牌批號封裝庫存備注價(jià)格
LATTICE
25+23+
BGA
13397
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨
 詢價(jià)
LATTICE
24+
BGA
23000
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系
 詢價(jià)
Lattice
04+
QFP
4
詢價(jià)
LATTICE
05+
原廠原裝
4451
只做全新原裝真實(shí)現(xiàn)貨供應(yīng)
 詢價(jià)
Lattice
23+
QFP
3600
絕對全新原裝!現(xiàn)貨!特價(jià)!請放心訂購!
 詢價(jià)
Lattice
24+
QFP
2250
100%全新原裝公司現(xiàn)貨供應(yīng)!隨時(shí)可發(fā)貨
 詢價(jià)
LATTICE
25+
QFP
4860
品牌專業(yè)分銷商,可以零售
 詢價(jià)
LATTICE
24+
QFP
6980
原裝現(xiàn)貨,可開13%稅票
 詢價(jià)
LATTICE
23+
NA
25060
只做進(jìn)口原裝,終端工廠免費(fèi)送樣
 詢價(jià)
ALTERA
1824+
BGA780
285
原裝現(xiàn)貨專業(yè)代理,可以代拷程序
 詢價(jià)
更多ISPLSI5256VE供應(yīng)商 更新時(shí)間2025-8-3 16:49:00

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