K4N26323AE中文資料三星數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

FOR 1M x 32Bit x 4 Bank GDDR2 SDRAM

The 4Mx32 GDDR2 is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x 1,048,976 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous features with Data Strobe allow extremely high performance up to 4GB/s/chip. I/O transactions are possible on both edges of the clock cycle. Range of operating frequencies, and programmable latencies allow the device to be useful for a variety of high performance memory system applications.

FEATURES

? 2.5V + 0.1V power supply for device operation

? 1.8V + 0.1V power supply for I/O interface

? On-Die Termination for all inputs except CKE,ZQ

? Output Driver Strength adjustment by EMRS

? SSTL_18 compatible inputs/outputs

? 4 banks operation

? MRS cycle with address key programs

- CAS latency : 5, 6, 7 (clock)

- Burst length : 4 only

- Burst type : sequential only

? Additive latency (AL): 0,1(clock)

? Read latency(RL) : CL+AL

? Write latency(WL) : AL+1

? Differential Data Strobes for Data-in, Date out ;

- 4 DQS and /DQS(one differential strobe per byte)

- Single Data Strobes by EMRS.

? Edge aligned data & data strobe output

? Center aligned data & data strobe input

? DM for write masking only

? Auto & Self refresh

? 32ms refresh period (4K cycle) (16ms is under consideration)

? 144 Ball FBGA

? Maximum clock frequency up to 500MHz

? Maximum data rate up to 1Gbps/pin

? DLL for Address, CMD and outputs