LPC47N217N集成電路（IC）的專用規(guī)格書PDF中文資料

General Description

The SMSC LPC47N217N is a 3.3V PC 99, PC2001, and ACPI 2.0 compliant Super I/O Controller. The LPC47N217N implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The part also includes 14 GPIO pins.

The LPC47N217N incorporates a 16C550A compatible UART and one Multi-Mode parallel port with

ChiProtect? circuitry plus EPP and ECP support. The LPC47N217N is easy to use and offers lower

system cost and reduced board area.

PRODUCT FEATURES

? 3.3 Volt Operation (5V tolerant)

? Programmable Wakeup Event Interface (IO_PME# Pin)

? SMI Support (IO_SMI# Pin)

? GPIOs (14)

? Two IRQ Input Pins

? XNOR Chain

? PC2001

? ACPI 2.0 Compliant

? 64-pin TQFP Package

? Intelligent Auto Power Management

? Serial Port

— One Full Function Serial Port

— High Speed 16C550A Compatible UART with Send/Receive 16-Byte FIFO

— Supports 230k and 460k Baud

— Programmable Baud Rate Generator

— Modem Control Circuitry

— Multiple Base I/O Address options and 15 IRQ Options

? Multi-Mode Parallel Port with ChiProtect?

— Standard Mode IBM PC/XT?, PC/AT?, and PS/2? Compatible Bidirectional Parallel Port

— Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)

— IEEE 1284 Compliant Enhanced Capabilities Port (ECP)

— ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On

— 192 Base I/O Address, 15 IRQ and 3 DMA Options ? LPC Bus Host Interface

— Multiplexed Command, Address and Data Bus

— 8-Bit I/O Transfers

— 8-Bit DMA Transfers

— 16-Bit Address Qualification

— Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems

— PCI CLKRUN# Support

— Power Management Event (IO_PME#) Interface Pin