MAX3877

2.5Gbps、+3.3V時鐘與數(shù)據(jù)再定時IC，帶有垂直調節(jié)閾值

The MAX3877/MAX3878 are compact, low-power clock recovery and data retiming ICs for 2.488Gbps SONET/ SDH applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input, which is retimed by the recovered clock. An additional 2.488Gbps ser; \n? Exceeds ANSI, ITU, and Bellcore SONET/SDH Specifications \n? Adjustable Input Threshold (±180mV) \n? 10mVp-p to 1.2Vp-p Differential Input Range \n? 540mW Power Dissipation (at +3.3V) \n? Fully Integrated Clock Recovery and Data Retiming \n? Optional Holdover Capability (Using External Ref;

MAX3877

2.5Gbps, 3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust

MAX3877EHJ

2.5Gbps, 3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust

MAX3877EHJ

Package：32-TQFP 裸露焊盤；包裝：散裝 類別：集成電路（IC） 應用特定時鐘/定時 描述：IC CLOCK/DATA RETIMING TQFP

MAX3877EHJ+T

Package：32-TQFP 裸露焊盤；包裝：托盤 類別：集成電路（IC） 應用特定時鐘/定時 描述：IC CLOCK/DATA RETIMING 32TQFP

MAX3877EHJ-T

Package：32-TQFP 裸露焊盤；包裝：散裝 類別：集成電路（IC） 應用特定時鐘/定時 描述：IC CLOCK/DATA RETIMING TQFP