MC14562BD中文資料摩托羅拉數(shù)據(jù)手冊PDF規(guī)格書

TheMC14562B is a 128–bit static shift register constructed with MOS P–channeland N–channel enhancement mode devices in a single monolithicstructure. Data is clockedin and out of the shift register on the positiveedge of the clock input. Data outputs are availableevery 16 bits, from 16 through bit 128. This complementary MOS shift register is primarily used where low power dissipation and/or high noise immunity is desired.

? Diode Protection on All Inputs

? Fully Static Operation

? Cascadable to Provide Longer Shift Register Lengths

? Supply Voltage Range = 3.0 Vdc to 18 Vdc

? Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range