MC74HC4020ANG集成電路（IC）的計(jì)數(shù)器除法器規(guī)格書PDF中文資料

MC74HC4020ANG屬于集成電路（IC）的計(jì)數(shù)器除法器。由安森美半導(dǎo)體公司制造生產(chǎn)的MC74HC4020ANG計(jì)數(shù)器，除法器計(jì)數(shù)器和除法器 IC 是數(shù)字邏輯器件，可對輸入發(fā)生的邏輯轉(zhuǎn)換進(jìn)行計(jì)數(shù)，然后使用多個并行輸出重新發(fā)送累加的計(jì)數(shù)，和/或生成單個輸出信號轉(zhuǎn)換，從而對應(yīng)用某些整數(shù)數(shù)量輸入信號轉(zhuǎn)換進(jìn)行響應(yīng)。除了簡單的事件計(jì)數(shù)，它們還可用于各種頻率合成應(yīng)用。

14?Stage Binary Ripple Counter

High?Performance Silicon?Gate CMOS

The MC74C4020A is identical in pinout to the standard CMOS MC14020B. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device consists of 14 master?slave flip?flops with 12 stages brought out to pins. The output of each flip?flop feeds the next and the frequency at each output is half of that of the preceding one. Reset is asynchronous and active?high.

State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and may have to be gated with the Clock of the HC4020A for some designs.

Features

? Output Drive Capability: 10 LSTTL Loads

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 2.0 to 6.0 V

? Low Input Current: 1 A

? High Noise Immunity Characteristic of CMOS Devices

? In Compliance With JEDEC Standard No. 7A Requirements

? Chip Complexity: 398 FETs or 99.5 Equivalent Gates

? Pb?Free Packages are Available*