MT90866AL中文資料Mitel數(shù)據(jù)手冊PDF規(guī)格書

Description

The MT90866 Digital Switch provides switching capacities of 4,096 x 2,432 channels between backplane and local streams, 2,432 x 2,432 channels among local streams and 2,048 x 2,048 channels among backplane streams. The local connected serial inputs and outputs have 32, 64 and 128 64kb/s channels per frame with data rates of 2.048, 4.096 and 8.192Mb/s respectively. The backplane connected serial inputs and outputs have 128 and 256 64kb/s channels per frame with data rates of 8.192 and 16.384Mb/s respectively.

Features

? 3.3V operation with 5V tolerant inputs and I/O’s

? 2,432 x 2,432 channel non-blocking switching among local streams

? 4,096 x 2,432 channel blocking switching between backplane and local streams

? 2,048 x 2,048 channel non-blocking switching among backplane streams

? Rate conversion between backplane and local streams

? Rate conversion among local streams

? Backplane interface accepts data rates of 8.192Mb/s or 16.384Mb/s

? Local interface accepts data rates of 2.048Mb/s, 4.096Mb/s or 8.192Mb/s

? Sub-rate switching (2 or 4 bits) configuration for local streams at a data rate of 2.048Mb/s

? Per-channel variable or constant throughput delay

? Fully compliant to H.110 Timing specifications

? Automatic frame offset delay measurement for backplane streams

? Per-stream input frame delay offset, up to 128 bytes, programmable for local streams on a per quarter bit or per channel basis

? Per-stream output frame advancement, programmable for backplane and local streams

? Per-channel direction control for backplane streams

? Per-channel message mode for backplane and local streams

? Per-channel high impedance output control for backplane and local streams

? Pseudo-Random Binary Sequence (PRBS) pattern generation and testing for backplane and local streams

? 5V tolerant PCI driver on CT-Bus I/O’s

? Integrated PLL, compatible to Stratum 4 Enhanced clock switching standard

? Non-multiplexed microprocessor interface

? Connection memory block programming for fast device initialization

? Tristate-control outputs for external drivers

? Conform to the mandatory requirements of the IEEE-1149.1 (JTAG) standard

Applications

? Multi-service access platforms

? CTI applications

? Gateways, Integrated Access Devices

? ST-BUS and H.110 interface applications