P-LFQFP64-10X10-0.50中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

■ Arm Cortex-M4 Core with Floating Point Unit (FPU)

? Armv7E-M architecture with DSP instruction set

? Maximum operating frequency: 120 MHz

? Support for 4-GB address space

? On-chip debugging system: JTAG, SWD, and ETM

? Boundary scan and Arm Memory Protection Unit (Arm MPU)

■ Memory

? Up to 512-KB code flash memory (40 MHz zero wait states)

? 8-KB data flash memory (125,000 erase/write cycles)

? 64-KB SRAM

? Flash Cache (FCACHE)

? Memory Protection Units (MPU)

? Memory Mirror Function (MMF)

? 128-bit unique ID

■ Connectivity

? Serial Communications Interface (SCI) with FIFO × 7

? Serial Peripheral Interface (SPI) × 2

? I2C bus interface (IIC) × 2

? CAN module (CAN) × 1

? IrDA interface

■ Analog

? 12-bit A/D Converter (ADC12) with 3 sample-and-hold circuits

each × 2

? 12-bit D/A Converter (DAC12) × 2

? High-Speed Analog Comparator (ACMPHS) × 6

? Programmable Gain Amplifier (PGA) × 6

? Temperature Sensor (TSN)

■ Timers

? General PWM Timer 32-bit Enhanced High Resolution

(GPT32EH) × 4

? General PWM Timer 32-bit Enhanced (GPT32E) × 4

? General PWM Timer 32-bit (GPT32) × 5

? Low Power Asynchronous General-Purpose Timer (AGT) × 2

? Watchdog Timer (WDT)

■ Safety

? SRAM parity error check

? Flash area protection

? ADC self-diagnosis function

? Clock Frequency Accuracy Measurement Circuit (CAC)

? Cyclic Redundancy Check (CRC) calculator

? Data Operation Circuit (DOC)

? Port Output Enable for GPT (POEG)

? Independent Watchdog Timer (IWDT)

? GPIO readback level detection

? Register write protection

? Main oscillator stop detection

? Illegal memory access