P83C554SBBD中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

This data sheet describes the 6 clock version of the 8xC554. This device is only available in 64L LQFP. The 8xC554 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 87C554 has the same instruction set as the 80C51. Three versions of the derivative exist:

? 83C554—16k bytes ROM

? 80C554—ROMless version

? 87C554—16k bytes EPROM

FEATURES

? 80C51 central processing unit

? 16k ×8 EPROM expandable externally to 64k bytes

? An additional 16-bit timer/counter coupled to four capture registers and three compare registers

? Two standard 16-bit timer/counters

? 512 ×8 RAM, expandable externally to 64k bytes

? Capable of producing eight synchronized, timed outputs

? A 10-bit ADC with seven multiplexed analog inputs

? Fast 8-bit ADC option – 9 μS at 16 MHz

? Two 8-bit resolution, pulse width modulation outputs

? Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs

? I2C-bus serial I/O port with byte oriented master and slave functions

? On-chip watchdog timer

? Extended temperature ranges

? Full static operation – 0 to 16 MHz

? Operating voltage range: 2.7 V to 5.5 V (0 to 8 MHz) and 4.5 V to 5.5 V (8 to 16 MHz)

commercial temperature

? Security bits:

– ROM – 2 bits

– OTP/EPROM – 3 bits

? 4 level priority interrupt

? 15 interrupt sources

? Full-duplex enhanced UART

– Framing error detection

– Automatic address recognition

? Power control modes

– Clock can be stopped and resumed

– Idle mode

– Power down mode

? Second DPTR register

? EMI reduction – 6 clock operation and ALE inhibit

? Programmable I/O pins

? Wake-up from power-down by external interrupts

? Software reset

? Power-on detect reset

? ADC charge pump disable

? ONCE mode

? ADC active in Idle mode