P87C51RD2FBD

80C51 Central Processing Unit

DESCRIPTION ThedevicesareSingle-Chip8-BitMicrocontrollersmanufacturedinanadvancedCMOSprocessandarederivativesofthe80C51microcontrollerfamily.Theinstructionsetis100compatiblewiththe80C51instructionset. FEATURES ?80C51CentralProcessingUnit –8kbytesOTP(87C

PHI

P87C51RD2FBD

80C51 8-bit microcontroller family; \n\n?80C51 Central Processing Unit \n?8 kbytes OTP (87C51RA2)\n\n?16 kbytes OTP (87C51RB2)\n\n?32 kbytes OTP (87C51RC2)\n\n?64 kbytes OTP (87C51RD2)\n\n?512 byte RAM (87C51RA2/RB2/RC2)\n\n?1 kbyte RAM (87C51RD2)\n\n?Boolean processor\n\n?Fully static operation\n\n?Low voltage (2.7 V to 5.5 V at 16 MHz) operation\n\n\n\n\n?12-clock operation with selectable 6-clock operation (via software or via parallel programmer)\n\n?Memory addressing capability \n?Up to 64 kbytes ROM and 64 kbytes RAM\n\n\n\n\n?Power control modes: \n?Clock can be stopped and resumed\n\n?Idle mode\n\n?Power-down mode\n\n\n\n\n?CMOS and TTL compatible\n\n?Two speed ranges at V CC = 5 V \n?0 to 30 MHz with 6-clock operation\n\n?0 to 33 MHz with 12-clock operation\n\n\n\n\n?Parallel programming with 87C51 compatible hardware interface to programmer\n\n?RAM expandable externally to 64 kbytes\n\n?Programmable Counter Array (PCA) \n?PWM\n\n?Capture/compare\n\n\n\n\n?PLCC, LQFP, or DIP package\n\n?Extended temperature ranges\n\n?Dual Data Pointers\n\n?Security bits (3 bits)\n\n?Encryption array - 64 bytes\n\n?Seven interrupt sources\n\n?4 interrupt priority levels\n\n?Four 8-bit I/O ports\n\n?Full-duplex enhanced UART \n?Framing error detection\n\n?Automatic address recognition\n\n\n\n\n?Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2 (capture and compare)\n\n?Programmable clock-out pin\n\n?Asynchronous port reset\n\n?Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock mode)\n\n?Wake-up from Power Down by an external interrupt\n\n\n;

OverviewThe devices are Single-Chip 8-Bit Microcontrollers manufactured in an advanced CMOS process and are derivatives of the 80C51 microcontroller family. The instruction set is 100% compatible with the 80C51 instruction set.\n The devices support 6-clock/12-clock mode selection by programming an OTP bit (OX2) using parallel programming. In addition, an SFR bit (X2) in the clock control register (CKCON) also selects between 6-clock/12-clock mode.\n The devices also have four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator and timing circuits.\n The added features of the P87C51RA2/RB2/RC2/RD2 make it a powerful microcontroller for applications that require pulse width modulation, high-speed I/O and up/down counting capabilities such as motor control.\n

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TS87C51RD2

HighPerformance8-bitMicrocontrollers

Description AtmelTS8xC51Rx2isahighperformanceCMOSROM,OTP,EPROMandROMlessversionsofthe80C51CMOSsinglechip8-bitmicrocontroller.TheTS8xC51Rx2retainsallfeaturesofthe80C51withextendedROM/EPROMcapacity(16/32/64Kbytes),256bytesofinternalRAM,a7-source,4-level

TS87C51RD2

HighPerformance8-bitMicrocontroller

TS87C51RD2

HighPerformance8-bitMicrocontroller